/*
 * Copyright(C) Paul und Scherer (mct.de/mct.net)
 *
 * This example demonstrates how to...
 *
 *  ... continuously read all ADC channels. The QSPI can do
 *      this stand-alone, after appropriate initialization.
 */

#include <stdio.h>
#include <sys/time.h>
#include <target.h>

/*
 * Initialize the QSPI for autonomous ADC communication.
 */
static void
qspi_init(void)
{
	int i;

	INTERN.qsm.qpar	 = 0x7b;		/* enable SPI pins */
	INTERN.qsm.qpdr	 = 0x78;		/* chip selects off */
	INTERN.qsm.qddr	 = 0x7e;		/* set data direction */
	INTERN.qsm.spcr0 = 0xb003;		/* master, 12 bits, SCK =sysclk/6 */
	INTERN.qsm.spcr1 = 0x1909;		/* timing */
	INTERN.qsm.spcr2 = 0x4d00;		/* wrap, 14 entries in queue */

	/*
	 * Fill command RAM and transmit
	 * data RAM for all 14 channels.
	 */
	for (i = 0; i < 14; i++){
		INTERN.qsm.comd_ram[i] = 0x7b;
		INTERN.qsm.tran_ram[i] = i<<8;
	}

	INTERN.qsm.spcr1 |= 0x8000;		/* go... */
}

/*
 * The QSPI is setup to automagically update the receive data
 * RAM with ADC channel data. After initializing the QSPI the
 * main program only has to print the contents of the receive
 * data RAM.
 */
int
main(void)
{
	int count = 0;

	qspi_init();

	while (1) {
		_delay(1000000);		/* pause to smooth output */

		/*
		 * Print header for every 16 lines.
		 */
		if (!(count++&0xf)) puts("CH 0 CH 1 CH 2 CH 3 CH 4 CH 5 CH 6 "
					 "CH 7 CH 8 CH 9 CH10 CH11 CH12 CH13");

		/*
		 * Print channel data.
		 *
		 * Note that the result for channel n is in receive
		 * data RAM[(n+1) mod 14] (the value, returned on a
		 * conversion request is the result of the PREVIOUS
		 * conversion request).
		 */
		printf("%4d %4d %4d %4d %4d %4d %4d %4d %4d %4d %4d %4d %4d %4d\n",
			INTERN.qsm.rec_ram[ 1],
			INTERN.qsm.rec_ram[ 2],
			INTERN.qsm.rec_ram[ 3],
			INTERN.qsm.rec_ram[ 4],
			INTERN.qsm.rec_ram[ 5],
			INTERN.qsm.rec_ram[ 6],
			INTERN.qsm.rec_ram[ 7],
			INTERN.qsm.rec_ram[ 8],
			INTERN.qsm.rec_ram[ 9],
			INTERN.qsm.rec_ram[10],
			INTERN.qsm.rec_ram[11],
			INTERN.qsm.rec_ram[12],
			INTERN.qsm.rec_ram[13],
			INTERN.qsm.rec_ram[ 0]
		);
	}
}